ANDI-FG library's interface to the DSP

On the ISA bus, the DSP host interface occupies a block of eight I/O ports, beginning at BASEADDRESS:

The functions of the various registers are described in detail in Section 10.

FG_send_command()

Causes an exception on the DSP to run the command:
command_byte = 0x12 + command + 0x80;
The 0x80 sets the Host Command bit on the CVR register, 0x12 is the default host vector and the commands are in increments of 1; the DSP will then call the exception vector at 2 * HV. This is described in section 10.2.6.2.2 ``Host to DSP - Command Vector'' on page 10-39 of the 56001 User's Manual.

FG_write_dsp()

Writes up to three bytes into the DSP transmit registers XH, XM and XL. The XL (low-order byte) should always be written last because it causes the data to the DSP's HRX buffer.

FG_read_dsp()

Reads up to three bytes from the DSP receive registers XH, XM and XL.

FG_get_status()

Reads the DSP's ISR register.

FG_init_dspinterface()

Initializes the DSP-Host interface by setting the INIT bit on the DSP's ICR. This is never called by the library we have; it would probably be useful in soft-reseting the DSP.

FG_boot_dsp()

Just reads BOOTBLOCKSIZE bytes from a file and writes them using FG_write_dsp, doesn't do anything special (BOOTBLOCKSIZE is #define'd in fglibv22.h as 24576). The Motorola documentation seems to imply that the DSP will load only 512 words into P-ram, starting at P:$0000 and then begin execution. Booting is described on page 10-43, section 10.2.6.2.3 ``Host to DSP - Bootstrap Loading Using the HI''. The ANDI-FG board has 8K of external P-ram, so the 24576 will fill this entirely.