This note describes our answer to Neil Gershenfeld's challenge. The Filament Chip is a single-chip network controller that simplifies the problem of connecting small, simple devices to digital networks.
There is a whole class of everyday objects that would benefit from a connection to digital networks: television remote controllers, appliances, telephones, even the lowly light switch deserve to be connected. But to date, the cost of connecting to a network is sufficiently high that such devices can't be sensibly tied into networks, so they remain isolated entities.
Over the past few months, a small team of students and researchers at the MIT Media Laboratory gathered to design a "lite" network interface. The fundamental goal of the design would be a chip (or chipset) that would, in Neil Gershenfeld's words, "make it easy to connect something as simple and inexpensive as a light switch to a computer network."
This informal note summarizes the recommendations made by the team. Some of the details--such as the protocols the host uses for reading and writing registers on the chip--are intentionally left vague in order to give an implementor latitude in the design.
On the "network side", we assume a Link Layer access chip. Specific link layer chips might include 10Base5, 10BaseT, 10Base2, fiber, IrDA, RS232, RS485.
Rather than dedicate pins to setting modes and configuration parameters, we've assumed the Filament Chip contains EEPROM. When the chip is first powered up, or upon a RESET, the chip is reset to default state. In the default state, the chip waits for configuration commands over the host-side serial port, running at 9600 baud in asynchronous mode (one start bit, one stop bit, eight bits of data, no parity).
| Pin Count | Description |
|---|---|
| 2 | Power, Ground |
| 2 | OSCI, OSCO -- crystal oscillator input and output pins. |
| 4 | mTxD, mRxD, mCLK, mCTRL -- four wire sync/async interface to a link layer chip. |
| 4 | hTxD, hRxD, hCLK, hCTRL -- four wire sync/async interface to the host. |
| 1 | INT -- interrupt line to host (could share a pin with hCTRL) |
| 1 | RESET -- when held low at power up, forces a reset of the chip to its default values. |
| 14 | total |
The suggested four-wire serial interface is just that -- a suggestion. There may be better ways to segregate clock and data bits in four wires than the way proposed.
In addition to these basic protocols, we assume the Filament chip supports a basic "discovery" protocol, such as BOOTP or DHCP (preferred). And layered atop UDP, we will assume SNMP for a simple communication model.
The chip will work in one of three primary modes, Discovery Mode, Datagram Mode or Management Mode.
Upon successful receipt of a DHCP reply, the operating parameters will be stored in registers internal to the Filament chip. These parameters will be lost the next time the chip is powered down or when RESET is asserted.
However, the can host "freeze" the configuration parameters in EEPROM by issuing a command over the serial line. Thereafter, at power up, the chip will immediately start using the operating parameters previously stored, and will forego the DHCP queries over the network.
In Datagram mode, the Filament Chip transfers raw UDP datagrams between the host and the network. Upon receipt of a UDP datagram, the Filament Chip will notify the host chip by asserting the INT line. Parameters gleaned from the header, such as the sender's address and whether or not the checksum is valid, are stored in fixed registers internal to the Filament Chip. The contents of these registers can be read over the host port using a simple command language.
The host can read the contents of the datagram's "payload" byte by byte over the serial port. When there are no more bytes available to be read, the host port's hCTRL line will indicate that there's no more data.
The host is responsible for generating the payload of outgoing datagrams, by writing the data into a buffer on the Filament chip. When the host tells the chip to send the datagram, the chip computes the checksum, assembles a packet, and squirts it into the link layer.
The Filament chip should have enough buffer memory to contain 4 UDP packets of some useful payload length (say 512 bytes). One buffer holds the last received datagram which the host is handling, another holds the next received datagram to be handled, another buffers a packet as it is read in from the link layer but before its checksum is verified, and a fourth buffer is used to assemble outgoing datagrams.
Note that the chip takes most of the burden of UDP processing off of the host. The host would only have to specify the destination address and port once before sending any number of datagrams to that destination.
In Management mode, the Filament Chip maintains a set of internal registers which can be "peeked" or "poked" from the network interface using simple commands. Similarly, the host can peek or poke the registers. When one or more internal registers change state as the result of management commands, the Filament Chip will assert the INT line to notify the host that there has been some change. It's up to the host to peek at the internal registers to decide which register has actually changed.
SNMP is one venerable candidate for a management protocol, although it may be too complex to incorporate into the Filament chip. If this is the case, we would suggest "Trivial Network Management Protocol". TNMP would be a subset of SNMP suitable for simple reading and writing of "virtual registers" while avoiding some of the costlier implementation issues that come with full SNMP (such as ASN.1 encoding).
The Filament Chip provides a simple and useful network interface, but there may be applications where TCP and various application protocols (SMTP, FTP, HTTP, DNS, and SNMP) may be desired. It should be possible to incorporate these protocols (and their associated buffers) into a protocol emulation chip which would sit between the host and the Filament chip.
The need for the Filament Chip was first articulated by Professor Neil Gershenfeld, director of the Physics and Media group, and co-director of the Things That Think research consortium. The entire Filament Chip effort owes its existence to Neil.
Robert Poor (r@media.mit.edu) organized a series of meetings discussions to draft the specifications and recommendations for the Filament Chip. The team consisted of: